Sasikanth Manipatruni

Publications

(pdf)
Sasikanth Manipatruni, Dmitri E Nikonov, Chia-Ching Lin, Tanay A Gosavi, Huichu Liu, Bhagwati Prasad, Yen-Lin Huang, Everton Bonturim, Ramamoorthy Ramesh, Ian A Young. Scalable energy-efficient magnetoelectric spin–orbit logic. Nature Publishing Group volume 565 Issue 7737, pages 35. January 2019.
Cited by: 105
abstract▾ | bib▾

Since the early 1980s, most electronics have relied on the use of complementary metal–oxide–semiconductor (CMOS) transistors. However, the principles of CMOS operation, involving a switchable semiconductor conductance controlled by an insulating gate, have remained largely unchanged, even as transistors are miniaturized to sizes of 10 nanometres. We investigated what dimensionally scalable logic technology beyond CMOS could provide improvements in efficiency and performance for von Neumann architectures and enable growth in emerging computing such as artifical intelligence. Such a computing technology needs to allow progressive miniaturization, reduce switching energy, improve device interconnection and provide a complete logic and memory family. Here we propose a scalable spintronic logic device that operates via spin–orbit transduction (the coupling of an electron’s angular momentum with its linear momentum) combined with magnetoelectric switching. The device uses advanced quantum materials, especially correlated oxides and topological states of matter, for collective switching and detection. We describe progress in magnetoelectric switching and spin–orbit detection of state, and show that in comparison with CMOS technology our device has superior switching energy (by a factor of 10 to 30), lower switching voltage (by a factor of 5) and enhanced logic density (by a factor of 5). In addition, its non-volatility enables ultralow standby power, which is critical to modern computing. The properties of our device indicate that the proposed technology could enable the development of multi-generational computing.
```
      @article{manipatruni2019scalable,
        title={Scalable energy-efficient magnetoelectric spin--orbit logic},
        author={Manipatruni, Sasikanth and Nikonov, Dmitri E and Lin, Chia-Ching and Gosavi, Tanay A and Liu, Huichu and Prasad, Bhagwati and Huang, Yen-Lin and Bonturim, Everton and Ramesh, Ramamoorthy and Young, Ian A},
        journal={Nature},
        volume={565},
        number={7737},
        pages={35},
        year={2019},
        publisher={Nature Publishing Group}
      }
    
```
(pdf)
Sourav Dutta, Dmitri E Nikonov, Sasikanth Manipatruni, Ian A Young, Azad Naeemi Overcoming thermal noise in non-volatile spin wave logic. Scientific reports volume 7 Issue 1 Pages 1915. 2017/5/15.
Cited by: 8
abstract▾ | bib▾

Spin waves are propagating disturbances in magnetically ordered materials, analogous to lattice waves in solid systems and are often described from a quasiparticle point of view as magnons. The attractive advantages of Joule-heat-free transmission of information, utilization of the phase of the wave as an additional degree of freedom and lower footprint area compared to conventional charge-based devices have made spin waves or magnon spintronics a promising candidate for beyond-CMOS wavebased computation. However, any practical realization of an all-magnon based computing system must undergo the essential steps of a careful selection of materials and demonstrate robustness with respect to thermal noise or variability. Here, we aim at identifying suitable materials and theoretically demonstrate the possibility of achieving error-free clocked non-volatile spin wave logic device, even in the presence of thermal noise and clock jitter or clock skew.
```
        @article{dutta2017overcoming,
          title={Overcoming thermal noise in non-volatile spin wave logic},
          author={Dutta, Sourav and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A and Naeemi, Azad},
          journal={Scientific reports},
          volume={7},
          number={1},
          pages={1915},
          year={2017},
          publisher={Nature Publishing Group}
        }
      
```
(pdf)
Michael Y-S Fang, Sasikanth Manipatruni, Casimir Wierzynski, Amir Khosrowshahi, Michael R DeWeese Design of optical neural networks with component imprecisions. Optics express Volume 27 Issue 10 Pages 14009-14029Pages 32.5. 1-32.5. 4. 2019/5/13.
Cited by: 4
abstract▾ | bib▾

For the benefit of designing scalable, fault resistant optical neural networks (ONNs), we investigate the effects architectural designs have on the ONNs’ robustness to imprecise components. We train two ONNs – one with a more tunable design (GridNet) and one with better fault tolerance (FFTNet) – to classify handwritten digits. When simulated without any imperfections, GridNet yields a better accuracy (∼98%) than FFTNet (∼95%). However, under a small amount of error in their photonic components, the more fault tolerant FFTNet overtakes GridNet. We further provide thorough quantitative and qualitative analyses of ONNs’ sensitivity to varying levels and types of imprecisions. Our results offer guidelines for the principled design of fault-tolerant ONNs as well as a foundation for further research.
```
        @article{fang2019design,
          title={Design of optical neural networks with component imprecisions},
          author={Fang, Michael Y-S and Manipatruni, Sasikanth and Wierzynski, Casimir and Khosrowshahi, Amir and DeWeese, Michael R},
          journal={Optics express},
          volume={27},
          number={10},
          pages={14009--14029},
          year={2019},
          publisher={Optical Society of America}
        }
      
```
(pdf)
IP Radu, Odysseas Zografos, Adrien Vaysset, Florin Ciubotaru, Jingdong Yan, Johan Swerts, Dunja Radisic, Basoene Briggs, Bart Soree, Mauricio Manfrini, Monique Ercken, Chris Wilson, Praveen Raghavan, Safak Sayan, Christoph Adelmann, Aaron Thean, L Amaru, P-E Gaillardon, G De Micheli, DE Nikonov, S Manipatruni, IA Young Spintronic majority gates. 2015 IEEE International Electron Devices Meeting (IEDM) Pages 32.5. 1-32.5. 4. 2015/12/7.
Cited by: 16
abstract▾ | bib▾

In this paper we present an overview of two types of majority gate devices based on spintronic phenomena. We compare the spin torque majority gate and the spin wave majority gate and describe work on these devices. We discuss operating conditions for the two device concepts, circuit implication and how these reflect on materials choices for device implementation..
```
        @inproceedings{radu2015spintronic,
          title={Spintronic majority gates},
          author={Radu, IP and Zografos, Odysseas and Vaysset, Adrien and Ciubotaru, Florin and Yan, Jingdong and Swerts, Johan and Radisic, Dunja and Briggs, Basoene and Soree, Bart and Manfrini, Mauricio and others},
          booktitle={2015 IEEE International Electron Devices Meeting (IEDM)},
          pages={32--5},
          year={2015},
          organization={IEEE}
        }
      
```
(pdf)
Sasikanth Manipatruni, Dmitri E Nikonov, Chia-Ching Lin, Tanay A Gosavi, Huichu Liu, Bhagwati Prasad, Yen-Lin Huang, Everton Bonturim, Ramamoorthy Ramesh, Ian A Young. Error-Resilient Spintronics via the Shannon-Inspired Model of Computation. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits volume 5 Issue 1, pages 10-18. 2019/4/12.

abstract▾ | bib▾

The energy and delay reductions from CMOS scaling have stagnated, motivating the search for a CMOS replacement. Spintronic devices are one of the promising beyond-CMOS alternatives. However, they exhibit high switching error rates of 1% or more when operated at energy and delay comparable to CMOS, rendering them incompatible with the deterministic nature of digital implementations. In this paper, we employ a Shannon-inspired model of computation to enhance the tolerance of all-spin logic (ASL)-based implementations to gate-level switching errors. We develop the logic-level path delay reallocation techniques to shape the output error statistics and propose a novel error compensation scheme to achieve higher tolerance to device-level switching errors while maintaining the classification accuracy of an ASL-based support vector machine (SVM) classifier.
```
          @article{patil2019error,
            title={Error-Resilient Spintronics via the Shannon-Inspired Model of Computation},
            author={Patil, Ameya D and Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A and Shanbhag, Naresh R},
            journal={IEEE Journal on Exploratory Solid-State Computational Devices and Circuits},
            volume={5},
            number={1},
            pages={10--18},
            year={2019},
            publisher={IEEE}
          }
        
```
(pdf)
Sou-Chi Chang, Uygar E Avci, Dmitri E Nikonov, Sasikanth Manipatruni, Ian A Young Physical origin of transient negative capacitance in a ferroelectric capacitor. Physical Review Applied volume 9 Issue 1, pages 014010.2018/1/10.
Cited by: 27
abstract▾ | bib▾

Transient negative differential capacitance, the dynamic reversal of transient capacitance in an electrical circuit, is of highly technological and scientific interest since it probes the foundation of ferroelectricity. We study a resistor-ferroelectric capacitor (R-FEC) network through a series of coupled equations based on Kirchhoff’s law, electrostatics, and Landau theory. We show that transient negative capacitance (NC) in a R-FEC circuit originates from the mismatch in switching rate between the free charge on the metal plate and the bound charge in a ferroelectric (FE) capacitor during the polarization switching. This transient free charge–polarization mismatch is driven by the negative curvature of the FE free-energy landscape, and it is also analytically shown that a free-energy profile with a negative curvature is the only physical system that can describe transient NC in a R-FEC circuit.
```
            @article{chang2018physical,
              title={Physical origin of transient negative capacitance in a ferroelectric capacitor},
              author={Chang, Sou-Chi and Avci, Uygar E and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A},
              journal={Physical Review Applied},
              volume={9},
              number={1},
              pages={014010},
              year={2018},
              publisher={APS}
            }
          
```
(pdf)
Dmitri E Nikonov, Sasikanth Manipatruni, Ian A Young Patterns and thresholds of magnetoelectric switching in spin logic devices. arXiv preprint arXiv:1709.07047, 2017/9/20.
Cited by : 3
abstract▾ | bib▾

In the quest to develop spintronic logic, it was discovered that magnetoelectric switching results in lower energy and shorter switching time than other mechanisms. Magnetoelectric (ME) field due to exchange bias at the interface with a multi-ferroic (such as BiFeO3) is well suited for 180 degree switching of magnetization. The ME field is determined by the direction of canted magnetization in BiFeO3 which can point at an angle to the plane, to which voltage is applied. Dependence of switching time and the threshold of ME field on its angles was determined by micromagnetic simulations. Switching occurs by formation of a domain wall on the side of the nanomagnet on top of BFO and its propagation to the rest of the magnet. For in-plane magnetization, switching occurs over a wide range of angles and at all magnitudes of ME field above threshold. For out-of-plane magnetization failure occurs (with an exception of a narrow range of angles and magnitudes of ME field) due to the domain wall reflecting from the opposite end of the nanomagnet
```
      @article{nikonov2017patterns,
        title={Patterns and thresholds of magnetoelectric switching in spin logic devices},
        author={Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A},
        journal={arXiv preprint arXiv:1709.07047},
        year={2017}
      }
    
```
(pdf)
Rouhollah Mousavi Iraei, Nickvash Kani, Sourav Dutta, Dmitri E Nikonov, Sasikanth Manipatruni, Ian A Young, John T Heron, Azad Naeemi Clocked Magnetostriction-Assisted Spintronic Device Design and Simulation. IEEE Transactions on Electron Devices Volume 65 Issue 5 Pages 2040-2046, 2018/4/4.
Cited by : 1
abstract▾ | bib▾

We propose a heterostructure device comprised of magnets and piezoelectrics, which significantly improves the delay and the energy dissipation of an all-spin logic (ASL) device. This paper studies and models the physics of the device, illustrates its operation, and benchmarks its performance using SPICE simulations. We show that the proposed device maintains low-voltage operation, nonreciprocity, nonvolatility, cascadability, and thermal reliability of the original ASL device. Moreover, by utilizing the deterministic switching of a magnet from the saddle point of the energy profile, the device is more efficient in terms of energy and delay and is robust to thermal fluctuations. The results of simulations show that compared to ASL devices, the proposed device achieves 21× shorter delay and 27× lower energy dissipation per bit for a 32-bit arithmetic-logic unit.
```
    @article{iraei2018clocked,
      title={Clocked Magnetostriction-Assisted Spintronic Device Design and Simulation},
      author={Iraei, Rouhollah Mousavi and Kani, Nickvash and Dutta, Sourav and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A and Heron, John T and Naeemi, Azad},
      journal={IEEE Transactions on Electron Devices},
      volume={65},
      number={5},
      pages={2040--2046},
      year={2018},
      publisher={IEEE}
    }
  
```
(pdf)
Rouhollah Mousavi Iraei, Sasikanth Manipatruni, Dmitri E Nikonov, Ian A Young, Azad Naeemi Electrical-spin transduction for CMOS-spintronic interface and long-range interconnects. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Volume 3 Pages 47-45, 2017/5/23.
Cited by : 8
abstract▾ | bib▾

We propose circuits for efficient transduction between electrical and spin signals and compare designs for long-range spintronic interconnects based on transducers and repeaters. This paper analytically analyzes the performance of spintronic all-spin logic (ASL) interconnects in terms of delay, area overhead, and energy dissipation, and validates the analysis by numerical simulations. The results of simulations show that compared to ASL repeaters, the proposed transducer-based interconnect achieves 5× shorter delay, 19× lower energy dissipation per bit per length, and a 9× smaller area-delay-power product for a 4 μm long interconnect. We show that the proposed interconnect can operate under supply voltage values ranging from 300 to 950 mV and tunnel magnetoresistance values ranging from 131% to 450%.
```
    @article{iraei2017electrical,
      title={Electrical-spin transduction for CMOS-spintronic interface and long-range interconnects},
      author={Iraei, Rouhollah Mousavi and Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A and Naeemi, Azad},
      journal={IEEE Journal on Exploratory Solid-State Computational Devices and Circuits},
      volume={3},
      pages={47--55},
      year={2017},
      publisher={IEEE}
    }
  
```
(pdf)
Ameya D Patil, Sasikanth Manipatruni, Dmitri Nikonov, Ian A Young, Naresh R Shanbhag Shannon-inspired statistical computing to enable spintronics. arXiv preprint arXiv:1702.06119, 2017/5/23.
Cited by : 10
abstract▾ | bib▾

Modern computing systems based on the von Neumann architecture are built from silicon complementary metal oxide semiconductor (CMOS) transistors that need to operate under practically error free conditions with 1 error in 10^15 switching events. The physical dimensions of CMOS transistors have scaled down over the past five decades leading to exponential increases in functional density and energy consumption. Today, the energy and delay reductions from scaling have stagnated, motivating the search for a CMOS replacement. Of these, spintronics offers a path for enhancing the functional density and scaling the energy down to fundamental thermodynamic limits of 100kT to 1000kT. However, spintronic devices exhibit high error rates of 1 in 10 or more when operating at these limits, rendering them incompatible with deterministic nature of the von Neumann architecture. We show that a Shannon-inspired statistical computing framework can be leveraged to design a computer made from such stochastic spintronic logic gates to provide a computational accuracy close to that of a deterministic computer. This extraordinary result allowing a 10^13 fold relaxation in acceptable error rates is obtained by engineering the error distribution coupled with statistical error compensation.
```
    @article{patil2017shannon,
      title={Shannon-inspired statistical computing to enable spintronics},
      author={Patil, Ameya D and Manipatruni, Sasikanth and Nikonov, Dmitri and Young, Ian A and Shanbhag, Naresh R},
      journal={arXiv preprint arXiv:1702.06119},
      year={2017}
    }
  
```
(pdf)
Adrien Vaysset, Mauricio Manfrini, Dmitri E Nikonov, Sasikanth Manipatruni, Ian A Young, Iuliana P Radu, Aaron Thean Operating conditions and stability of spin torque majority gates: Analytical understanding and numerical evidence. Journal of Applied Physics Volume 121 issue 4 Pages 043902, 2017/1/28.
Cited by : 8
abstract▾ | bib▾

The functionality of a cross-shaped Spin Torque Majority Gate (STMG) is primarily limited by the pinning of a domain wall (DW) at the center of the device. Here, an analytical model is built to calculate the conditions for such a pinning and to deduce the operating range. The assumptions of the model and the conclusions are validated by micromagnetic simulations. The total magnetic energy of the DW state is derived. By minimizing this energy with respect to two degrees of freedom, the DW stability condition is obtained. We find that the lateral length of the STMG is the critical dimension: it must be smaller than about five times the DW width. This result is confirmed by micromagnetic simulations with a high accuracy. In process, we solved a more fundamental problem: the macrospin limit of a finite ferromagnet containing one pinning site. We found the correction of the usual DW width expression due to finite length of wires.
```
    @article{vaysset2017operating,
      title={Operating conditions and stability of spin torque majority gates: Analytical understanding and numerical evidence},
      author={Vaysset, Adrien and Manfrini, Mauricio and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A and Radu, Iuliana P and Thean, Aaron},
      journal={Journal of Applied Physics},
      volume={121},
      number={4},
      pages={043902},
      year={2017},
      publisher={AIP Publishing}
    }
  
```
(pdf)
Pourahmad, Vahnood and Manipatruni, Sasikanth and Nikonov, Dmitri and Young, Ian and Afshari, Ehsan Nonboolean pattern recognition using chains of coupled CMOS oscillators as discriminant circuits. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Volume 3 issue 4 Pages 1-9, 2017/1/17.
Cited by : 4
abstract▾ | bib▾

Networks of weakly coupled oscillators are special cases of Hopfield networks and as such may be used in building physical systems capable of associative memory recall and pattern recognition. However, the existing architectures are not suitable for hardware implementation mainly due to the complexity of required couplings between the oscillators. In this paper, we propose an alternative way of using coupled oscillators in what we call “discriminant circuits” in analogy to the concept of “discriminant functions” in the field of artificial intelligence and machine learning. The main advantage of our system is in the simplicity of its architecture, which relies only on local couplings between adjacent oscillators. Using this architecture, we design a network of coupled CMOS oscillators as the core of a physical non-Boolean pattern recognition engine. The simplicity of the proposed circuit makes it readily implementable on any standard CMOS technology.
```
    @article{pourahmad2017nonboolean,
      title={Nonboolean pattern recognition using chains of coupled CMOS oscillators as discriminant circuits},
      author={Pourahmad, Vahnood and Manipatruni, Sasikanth and Nikonov, Dmitri and Young, Ian and Afshari, Ehsan},
      journal={IEEE Journal on Exploratory Solid-State Computational Devices and Circuits},
      volume={3},
      pages={1--9},
      year={2017},
      publisher={IEEE}
    }
  
```
(pdf)
Sou-Chi Chang, Sasikanth Manipatruni, Dmitri E Nikonov, Ian A Young, Azad Naeemi Low-power Spin Valve Logic using Spin-transfer Torque with Automotion of Domain Walls. arXiv preprint arXiv:1609.06281 , 2016/9/20.

abstract▾ | bib▾

A novel scheme for non-volatile digital computation is proposed using spin-transfer torque (STT) and automotion of magnetic domain walls (DWs). The basic computing element is composed of a lateral spin valve (SV) with two ferromagnetic (FM) wires served as interconnects, where DW automotion is used to propagate the information from one device to another. The non-reciprocity of both device and interconnect is realized by sizing different contact areas at the input and the output as well as enhancing the local damping mechanism. The proposed logic is suitable for scaling due to a high energy barrier provided by a long FM wire. Compared to the scheme based on non-local spin valves (NLSVs) in the previous proposal, the devices can be operated at lower current density due to utilizing all injected spins for local magnetization reversals, and thus improve both energy efficiency and resistance to electromigration. This device concept is justified by simulating a buffer, an inverter, and a 3-input majority gate with comprehensive numerical simulations, including spin transport through the FM/non-magnetic (NM) interfaces as well as the NM channel and stochastic magnetization dynamics inside FM wires. In addition to digital computing, the proposed framework can also be used as a transducer between DWs and spin currents for higher wiring flexibility in the interconnect network.
```
    @article{low-power,
      title={Low-power Spin Valve Logic using Spin-transfer Torque with Automotion of Domain Walls},
      author={Sou-Chi Chang, Sasikanth Manipatruni, Dmitri E Nikonov, Ian A Young, Azad Naeemi},
      journal={arXiv preprint arXiv:1609.06281},
      year={2016},
      publisher={arXiv}
    }
  
```
(pdf)
Dutta, Sourav and Iraei, Rouhollah Mousavi and Pan, Chenyun and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A and Naeemi, Azad Impact of spintronics transducers on the performance of spin wave logic circuit 2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO) Pages 990-993, 2016/8/22.
Cited by: 5
abstract▾ | bib▾

We propose a comprehensive scheme for building spintronics transducers for back and forth signal conversion between spin and charge domains in addition to the associated CMOS peripheral circuitry for spin wave device (SWD) circuits. We perform systematic analysis of the impact of the transducers on the performance of SWD in terms of energy and area overhead. Performance evaluation of SWD compared with 7nm FinFET CMOS technology at the circuit level, yields a 3× smaller area and an order of magnitude lower energy-delay product (EDP) for large complex circuits with low overhead. Overall, SWD outperforms CMOS with increasing ratio of (logic size/overhead).
```
    @inproceedings{dutta2016impact,
      title={Impact of spintronics transducers on the performance of spin wave logic circuit},
      author={Dutta, Sourav and Iraei, Rouhollah Mousavi and Pan, Chenyun and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A and Naeemi, Azad},
      booktitle={2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO)},
      pages={990--993},
      year={2016},
      organization={IEEE}
    }
  
```
(pdf)
Vaysset, Adrien and Manfrini, Mauricio and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A and Pourtois, Geoffrey and Radu, Iuliana P and Thean, Aaron Toward error-free scaled spin torque majority gates AIP Advances volume 6 issue 6 Pages 065304, 2016/6/6.
Cited by: 8
abstract▾ | bib▾

The functionality of a cross-shaped Spin Torque Majority Gate is explored by means of micromagnetic simulations. The different input combinations are simulated varying material parameters, current density and size. The main failure mode is identified: above a critical size, a domain wall can be pinned at the center of the cross, preventing further propagation of the information. By simulating several phase diagrams, the key parameters are obtained and the operating condition is deduced. A simple relation between the domain wall width and the size of the Spin Torque Majority Gate determines the working range. Finally, a correlation is found between the energy landscape and the main failure mode. We demonstrate that a macrospin behavior ensures a reliable majority gate operation.
```
    @article{vaysset2016toward,
      title={Toward error-free scaled spin torque majority gates},
      author={Vaysset, Adrien and Manfrini, Mauricio and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A and Pourtois, Geoffrey and Radu, Iuliana P and Thean, Aaron},
      journal={AIP Advances},
      volume={6},
      number={6},
      pages={065304},
      year={2016},
      publisher={AIP Publishing}
    }
  
```
(pdf)
Naeemi, Azad and Chang, Sou-Chi and Dutta, Sourav and Pan, Chenyun and Manipatruni, Sasikanth and Nikonov, Dmitri and Young, Ian. Spin-based interconnect technology and design 2016 IEEE International Interconnect Technology Conference/Advanced Metallization Conference (IITC/AMC) Pages 1-64, 2016/5/23.
Cited by: 1
abstract▾ | bib▾

Presents a collection of slides covering the following topics: electron spin; spintronics; interconnects; Si microelectronics; beyond-CMOS nanoelectronics; state variables; drift-diffusion spin devices; spin transport parameters in materials; and spin wave circuits.
```
    @inproceedings{naeemi2016spin,
      title={Spin-based interconnect technology and design},
      author={Naeemi, Azad and Chang, Sou-Chi and Dutta, Sourav and Pan, Chenyun and Manipatruni, Sasikanth and Nikonov, Dmitri and Young, Ian},
      booktitle={2016 IEEE International Interconnect Technology Conference/Advanced Metallization Conference (IITC/AMC)},
      pages={1--64},
      year={2016},
      organization={IEEE}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A. Material targets for scaling all-spin logic Physical Review Applied volume 5 issue 1 Pages 014002, 2016/1/7.
Cited by: 33
abstract▾ | bib▾

All-spin logic devices are promising candidates to augment and complement beyond-CMOS integrated circuit computing due to non-volatility, ultra-low operating voltages, higher logical efficiency, and high density integration. However, the path to reach lower energy-delay product performance compared to CMOS transistors currently is not clear. We show that scaling and engineering the nanoscale magnetic materials and interfaces is the key to realizing spin logic devices that can surpass energy-delay performance of CMOS transistors. With validated stochastic nano-magnetic and vector spin transport numerical models, we derive the target material and interface properties for the nanomagnets and channels. We identified promising new directions for material engineering/discovery focusing on systematic scaling of magnetic anisotropy (Hk) with saturation magnetization (Ms), use of perpendicular magnetic anisotropy, and interface spin mixing conductance of ferromagnet/spin channel interface (Gmix). We provide systematic targets for scaling spin logic energy-delay product toward a 2 aJ.ns energy-delay product, comprehending the stochastic noise for nanomagnets.
```
    @article{manipatruni2016material,
      title={Material targets for scaling all-spin logic},
      author={Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A},
      journal={Physical Review Applied},
      volume={5},
      number={1},
      pages={014002},
      year={2016},
      publisher={APS}
    }
  
```
(pdf)
Chang, Sou-Chi and Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A. Clocked domain wall logic using magnetoelectric effects. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits volume 2 Pages 1-9, 2016/1/6.
Cited by: 10
abstract▾ | bib▾

A new digital device scheme based on the magnetoelectric coupling and automotion of the magnetic domain wall is proposed. A single device is composed of a ferromagnetic wire and two ferroelectric capacitors served as the input and the output. It is shown that with the initialization in the magnetic states, a single device and the corresponding majority gate can realize the NOT, NAND, and NOR functions. Furthermore, the device has the cascadability, input-output isolation, gain, and nonreciprocity. The device concepts are justifed by the numerical calculation, including the Landau-Lifshitz-Gilbert equation for the magnetization dynamics, the Landau-Khalatnikov equation for the electric polarization dynamics, and the electrostatic equations for the open-circuit output voltage and the charge sharing process between devices. The energy dissipation is also quantified and shown to be two to three orders of magnitude less than that in spin-torque-driven devices.
```
    @article{chang2016clocked,
      title={Clocked domain wall logic using magnetoelectric effects},
      author={Chang, Sou-Chi and Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A},
      journal={IEEE Journal on Exploratory Solid-State Computational Devices and Circuits},
      volume={2},
      pages={1--9},
      year={2016},
      publisher={IEEE}
    }
  
```
(pdf)
Sourav Dutta, Dmitri E Nikonov, Sasikanth Manipatruni, Ian A Young, Azad Naeemi. Phase-dependent deterministic switching of magnetoelectric spin wave detector in the presence of thermal noise via compensation of demagnetization. Applied Physics Letters volume 107 issue 19 Pages 192404, 2015/11/9.
Cited by: 10
abstract▾ | bib▾

The possibility of achieving phase-dependent deterministic switching of the magnetoelectric spin wave detector in the presence of thermal noise has been discussed. The proposed idea relies on the modification of the energy landscape by partially canceling the out-of-plane demagnetizing field and the resultant change in the intrinsic magnetization dynamics to drive the nanomagnet towards a preferential final magnetization state. The remarkable increase in the probability of successful switching can be accounted for by the shift in the location of the saddle point in the energy landscape and a resultant change in the nature of the relaxation dynamics of the magnetization from a highly precessional to a fairly damped one and an increased dependence on the initial magnetization values, a crucial requirement for phase-dependent spin wave detection.
```
    @article{dutta2015phase,
      title={Phase-dependent deterministic switching of magnetoelectric spin wave detector in the presence of thermal noise via compensation of demagnetization},
      author={Dutta, Sourav and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A and Naeemi, Azad},
      journal={Applied Physics Letters},
      volume={107},
      number={19},
      pages={192404},
      year={2015},
      publisher={AIP Publishing}
    }
  
```
(pdf)
Chang, Sou-C and Dutta, Sourav and Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A and Naeemi, Azad. Interconnects for all-spin logic using automotion of domain walls. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits volume 1 Pages 49-57, 2015/6/22.
Cited by: 15
abstract▾ | bib▾

In this paper, an interconnect scheme based on automotion of domain walls (DWs) for all-spin logic (ASL) has been proposed. The proposed interconnect is analyzed using a comprehensive numerical model including an equivalent circuit for ASL operations, the 1-D Landau-Lifshitz-Gilbert equation for DW creation, reflection, and disappearance at the boundaries. Analytical expressions for DWtransport along the wire are also presented. From the model, it is found that the reflection of the DW can be eliminated using a material with a high Gilbert damping coefficient at the end, the energy dissipation can be independent of the interconnect length, and DWdisplacement and energy dissipation can be further improved using a material with a low damping factor and saturation magnetization. Furthermore, the interconnect reliability is also studied by applying the thermal random noise analysis on the dynamics of DWs, and it is found that thermal fluctuations can have a significant impact on the interconnect performance; thus, the interconnect with a low Gilbert damping factor is desired to suppress the thermal noise effects.
```
    @article{chang2015interconnects,
      title={Interconnects for all-spin logic using automotion of domain walls},
      author={Chang, Sou-C and Dutta, Sourav and Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A and Naeemi, Azad},
      journal={IEEE Journal on Exploratory Solid-State Computational Devices and Circuits},
      volume={1},
      pages={49--57},
      year={2015},
      publisher={IEEE}
    }
  
```
(pdf)
Dutta, Sourav and Chang, Sou-Chi and Kani, Nickvash and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A and Naeemi, Azad. Non-volatile clocked spin wave interconnect for beyond-CMOS nanomagnet pipelines. Scientific reports volume 5 Pages 9861, 2015/5/8.
Cited by: 48
abstract▾ | bib▾

The possibility of using spin waves for information transmission and processing has been an area of active research due to the unique ability to manipulate the amplitude and phase of the spin waves for building complex logic circuits with less physical resources and low power consumption. Previous proposals on spin wave logic circuits have suggested the idea of utilizing the magneto-electric effect for spin wave amplification and amplitude-or phase-dependent switching of magneto-electric cells. Here, we propose a comprehensive scheme for building a clocked non-volatile spin wave device by introducing a charge-to-spin converter that translates information from electrical domain to spin domain, magneto-electric spin wave repeaters that operate in three different regimes-spin wave transmitter, non-volatile memory and spin wave detector, and a novel clocking scheme that ensures sequential transmission of information and non-reciprocity. The proposed device satisfies the five essential requirements for logic application: nonlinearity, amplification, concatenability, feedback prevention, and complete set of Boolean operations.
```
    @article{dutta2015non,
      title={Non-volatile clocked spin wave interconnect for beyond-CMOS nanomagnet pipelines},
      author={Dutta, Sourav and Chang, Sou-Chi and Kani, Nickvash and Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A and Naeemi, Azad},
      journal={Scientific reports},
      volume={5},
      pages={9861},
      year={2015},
      publisher={Nature Publishing Group}
    }
  
```
(pdf)
Allen, Gary and Manipatruni, Sasikanth and Nikonov, Dmitri E and Doczy, Mark and Young, Ian A. Experimental demonstration of the coexistence of spin Hall and Rashba effects in β− tantalum/ferromagnet bilayers. Physical Review B volume 91 issue 14 Pages 144412, 2015/4/16.
Cited by: 71
abstract▾ | bib▾

We have measured the spin torques of β− tantalum/C o 20 F e 60 B 20 bilayers versus Ta thickness at room temperature using a ferromagnetic resonance (FMR) technique. A significant fieldlike spin torque originating from Ta was identified, which is constant and independent of Ta thickness. Because of this constant torque, the spin Hall coefficient θ SH needs to be calculated from the ratio of the symmetric component of the FMR signal to the slope of the antisymmetric component with Ta thickness, from which a value of− 0.11±0.01 was determined. The saturation magnetization of the CoFeB layers for samples deposited with Ta was found to be smaller than that of a single CoFeB layer, with values of 1.84±0.01 and 1.92±0.01 T, respectively. The origin of the fieldlike torque is ascribed to an interface spin-orbit coupling, or Rashba effect, due to the strength and constancy of the torque with Ta thickness. From fitting measured data to a semiclassical diffusion model that includes interface spin-orbit coupling, we have determined the spin diffusion length for β-tantalum to be 2.5 nm.
```
    @article{allen2015experimental,
      title={Experimental demonstration of the coexistence of spin Hall and Rashba effects in $\beta$- tantalum/ferromagnet bilayers},
      author={Allen, Gary and Manipatruni, Sasikanth and Nikonov, Dmitri E and Doczy, Mark and Young, Ian A},
      journal={Physical Review B},
      volume={91},
      number={14},
      pages={144412},
      year={2015},
      publisher={APS}
    }
  
```
(pdf)
Dutt, Avik and Luke, Kevin and Manipatruni, Sasikanth and Gaeta, Alexander L and Nussenzveig, Paulo and Lipson, Michal. On-chip optical squeezing. Physical Review Applied volume 3 issue 4 Pages 044005, 2015/4/13.
Cited by: 117
abstract▾ | bib▾

We report the observation of all-optical squeezing in an on-chip monolithically integrated CMOS-compatible platform. Our device consists of a low-loss silicon nitride microring optical parametric oscillator (OPO) with a gigahertz cavity linewidth. We measure 1.7 dB (5 dB corrected for losses) of sub-shot-noise quantum correlations between bright twin beams generated in the microring four-wave-mixing OPO pumped above threshold. This experiment demonstrates a compact, robust, and scalable platform for quantum-optics and quantum-information experiments on chip.
```
    @article{dutt2015chip,
      title={On-chip optical squeezing},
      author={Dutt, Avik and Luke, Kevin and Manipatruni, Sasikanth and Gaeta, Alexander L and Nussenzveig, Paulo and Lipson, Michal},
      journal={Physical Review Applied},
      volume={3},
      number={4},
      pages={044005},
      year={2015},
      publisher={APS}
    }
  
```
(pdf)
Shine, Gautam and Manipatruni, Sasikanth and Chaudhry, Anurag and Saraswat, Krishna C and Nikonov, Dmitri E and Young, Ian A. Extended Hückel theory for quantum transport in magnetic tunnel junctions. 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pages 301--304, 2014/9/9.
Cited by: 1
abstract▾ | bib▾

Spin-resolved conductivities in magnetic tunnel junctions are calculated using a semiempirical tight-binding model and non-equilibrium Green's functions. The performance of half-metallic electrodes is studied by comparing conventional Fe-MgO-Fe structures to Co 2 FeAl-MgO-Co 2 FeAl structures. The results show higher tunneling magnetoresistance and resistance-area product for Co 2 FeAl devices across a wide bias range.
```
    @inproceedings{shine2014extended,
      title={Extended H{\"u}ckel theory for quantum transport in magnetic tunnel junctions},
      author={Shine, Gautam and Manipatruni, Sasikanth and Chaudhry, Anurag and Saraswat, Krishna C and Nikonov, Dmitri E and Young, Ian A},
      booktitle={2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)},
      pages={301--304},
      year={2014},
      organization={IEEE}
    }
  
```
(pdf)
Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A. Automotion of domain walls for spintronic interconnects. Journal of Applied Physics volume 115 issue 21 Pages 213902, 2014/6/7.
Cited by: 25
abstract▾ | bib▾

We simulate “automotion,” the transport of a magnetic domain wall under the influence of demagnetization and magnetic anisotropy, in nanoscale spintronic interconnects. In contrast to spin transfer driven magnetic domain wall motion, the proposed interconnects operate without longitudinal charge current transfer, with only a transient current pulse at domain wall creation and have favorable scaling down to the 20 nm dimension. Cases of both in-plane and out-of-plane magnetization are considered. Analytical dependence of the velocity of domain walls on the angle of magnetization are compared with full micromagnetic simulations. Deceleration, attenuation and disappearance, and reflection of domain walls are demonstrated through simulation. Dependences of the magnetization angle on the current pulse parameters are studied. The energy and delay analysis suggests that automotion is an attractive option for spintronic logic interconnects.
```
    @article{nikonov2014automotion,
      title={Automotion of domain walls for spintronic interconnects},
      author={Nikonov, Dmitri E and Manipatruni, Sasikanth and Young, Ian A},
      journal={Journal of Applied Physics},
      volume={115},
      number={21},
      pages={213902},
      year={2014},
      publisher={AIP}
    }
  
```
(pdf)
Rouhollah Mousavi Iraei, Phillip Bonhomme, Nickvash Kani, Sasikanth Manipatruni, Dmitri E Nikonov, Ian A Young, Azad Naeemi. Impact of dimensional scaling and size effects on beyond CMOS All-Spin Logic interconnects. IEEE International Interconnect Technology Conference Pages 353-356, 2014/5/20.
Cited by: 9
abstract▾ | bib▾

The energy-per-bit and delay of All-Spin Logic (ASL) interconnects have been modeled. Both Al and Cu interconnect channels have been considered and the impact of size effects and dimensional scaling on their potential performance has been quantified. It is predicted that size effects will affect ASL interconnects more severely than electrical interconnects.
```
    @article{nikonov2014Dimensional,
      title={Impact of dimensional scaling and size effects on beyond CMOS All-Spin Logic interconnects},
      author={Rouhollah Mousavi Iraei, Phillip Bonhomme, Nickvash Kani, Sasikanth Manipatruni, Dmitri E Nikonov, Ian A Young, Azad Naeemi},
      journal={IEEE International Interconnect Technology Conference},
      pages={353-356},
      year={2014},
      publisher={IEEE}
    }
  
```
(pdf)
Rouhollah Mousavi Iraei, Phillip Bonhomme, Nickvash Kani, Sasikanth Manipatruni, Dmitri E Nikonov, Ian A Young, Azad Naeemi. Circuit simulation of magnetization dynamics and spin transport. IEEE Transactions on Electron Devices volume 61 issue 5 Pages 1553--1560, 2014/3/28.
Cited by: 40
abstract▾ | bib▾

In this paper, compact circuit models for spintronic devices have been developed by manipulating the underlying physical equations. We have simulated, via circuit simulation: 1) the magnetization dynamics governed by the Landau-Lifshitz-Gilbert (LLG) equation and 2) the spin transport physics governed by the spin drift-diffusion equation. The models have been validated using numerical and analytical solutions of the LLG equation and the spin drift-diffusion equations, respectively. Simulations of an all-spin logic device demonstrate the applications of the developed models in device and circuit simulation.
```
    @article{bonhomme2014circuit,
      title={Circuit simulation of magnetization dynamics and spin transport},
      author={Bonhomme, Phillip and Manipatruni, Sasikanth and Iraei, Rouhollah M and Rakheja, Shaloo and Chang, Sou-Chi and Nikonov, Dmitri E and Young, Ian A and Naeemi, Azad},
      journal={IEEE Transactions on Electron Devices},
      volume={61},
      number={5},
      pages={1553--1560},
      year={2014},
      publisher={IEEE}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A. All-spin nanomagnetic state elements. Applied Physics Letters volume 103 issue 6 Pages 063503, 2013/8/5.
Cited by: 11
abstract▾ | bib▾

We propose an all-spin state element using spin currents and nanomagnets to enable all-spin state machines for digital computing. We demonstrate via numerical simulations the operation of the state element, a critical building block for synchronous, sequential logic computation. The numerical models encompass Landau-Lifshitz-Gilbert nanomagnet dynamics with stochastic models and vector spin-transport in metallic magnetic and non-magnetic channels. Combined with all-spin combinatorial logic, the state elements can enable synchronous and asynchronous computing elements.
```
    @article{manipatruni2013all,
      title={All-spin nanomagnetic state elements},
      author={Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A},
      journal={Applied Physics Letters},
      volume={103},
      number={6},
      pages={063503},
      year={2013},
      publisher={AIP}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A. Voltage and energy-delay performance of giant spin Hall effect switching for magnetic memory and logic. arXiv preprint arXiv:1301.5374, 2013/1/23.
Cited by: 27
abstract▾ | bib▾

In this letter, we show that Giant Spin Hall Effect (GSHE) MRAM can enable better energy-delay and voltage performance than traditional MTJ based spin torque devices at scaled nanomagnet dimensions (10-30 nm). Firstly, we derive the effect of dimensional scaling on spin injection efficiency, voltage-delay and energy-delay of spin torque switching using MTJs and GSHE and identify the optimum electrode geometry for low operating voltage (< 0.1 V), high speed (> 10 GHz) operation. We show that effective spin injection efficiency> 100% can be obtained using optimum spin hall electrode thickness for 30 nm nanomagnet widths. Finally, we derive the energy-delay trajectory of GSHE and MTJ devices to calculate the energy-delay product of GSHE and MTJ devices with an energy minimum at the characteristic time of the magnets. Optimized GSHE devices when combined with PMA can enable MRAM with scaled nanomagnets (30 nm X 60 nm), ultra-low voltage operation (< 0.1 V), fast switching times (10 ps) and switching energy as low as 100 aJ/bit.
```
    @article{manipatruni2013voltage,
      title={Voltage and energy-delay performance of giant spin Hall effect switching for magnetic memory and logic},
      author={Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A},
      journal={arXiv preprint arXiv:1301.5374},
      year={2013}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Lipson, Michal and Young, Ian A. Device scaling considerations for nanophotonic CMOS global interconnects. IEEE Journal of Selected Topics in Quantum Electronics volume 19 issue 2 pages 8200109--8200109, 2013/1/10.
Cited by : 36
abstract▾ | bib▾

We introduce an analytical framework to understand the path for scaling nanophotonic interconnects to meet the energy and footprint requirements of CMOS global interconnects. We derive the device requirements for sub-100 fJ/cm/bit interconnects including tuning power, serialization-deserialization energy, and optical insertion losses. Using CMOS with integrated nanophotonics as an example platform, we derive the energy/bit, linear, and areal bandwidth density of optical interconnects. We also derive the targets for device performance which indicate the need for continued improvements in insertion losses (<;8 dB), laser efficiency, operational speeds (>40 Gb/s), tuning power (<;100 μW/nm), serialization-deserialization (<;10 fJ/bit/Operation), and necessity for spectrally selective devices with wavelength multiplexing (>6 channels).
```
    @article{manipatruni2013device,
      title={Device scaling considerations for nanophotonic CMOS global interconnects},
      author={Manipatruni, Sasikanth and Lipson, Michal and Young, Ian A},
      journal={IEEE Journal of Selected Topics in Quantum Electronics},
      volume={19},
      number={2},
      pages={8200109--8200109},
      year={2013},
      publisher={IEEE}
    }
  
```
(pdf)
Zhang, Mian and Wiederhecker, Gustavo S and Manipatruni, Sasikanth and Barnard, Arthur and McEuen, Paul L and Lipson, Michal. Synchronization of coupled optomechanical oscillators. CLEO: Science and Innovations pages CW1M--2, 2012/5/6.
Cited by: 3
abstract▾ | bib▾

We demonstrate experimentally the synchronization of two micromechanical oscillators actuated by the optical radiation field. The mutual coupling is purely optical and fully tunable. Upon synchronization, the phase noise drops in agreement with the prediction.
```
    @inproceedings{zhang2012synchronization,
      title={Synchronization of coupled optomechanical oscillators},
      author={Zhang, Mian and Wiederhecker, Gustavo S and Manipatruni, Sasikanth and Barnard, Arthur and McEuen, Paul L and Lipson, Michal},
      booktitle={CLEO: Science and Innovations},
      pages={CW1M--2},
      year={2012},
      organization={Optical Society of America}
    }
  
```
(pdf)
Padmaraju, Kishore and Ophir, Noam and Xu, Qianfan and Schmidt, Bradley and Shakya, Jagat and Manipatruni, Sasikanth and Lipson, Michal and Bergman, Keren. Error-free transmission of microring-modulated BPSK. Optics express volume 20 issue 8 pages 8681--8688, 2012/4/9.
Cited by: 36
abstract▾ | bib▾

We demonstrate the generation of error-free binary-phase-shift-keyed (BPSK) data at 5 Gb/s using a silicon microring modulator. The microring-modulated BPSK signal is propagated at fiber lengths up to 80 km, maintaining error-free performance, while demonstrating resilience to chromatic dispersion. Bit-error-rate measurements and eye diagrams show near equivalent performance of a microring-based BPSK modulator as compared to commercial LiNbO_3 phase modulators.
```
    @article{padmaraju2012error,
      title={Error-free transmission of microring-modulated BPSK},
      author={Padmaraju, Kishore and Ophir, Noam and Xu, Qianfan and Schmidt, Bradley and Shakya, Jagat and Manipatruni, Sasikanth and Lipson, Michal and Bergman, Keren},
      journal={Optics express},
      volume={20},
      number={8},
      pages={8681--8688},
      year={2012},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A. Circuit theory for spice of spintronic integrated circuits. arXiv preprint arXiv:1112.2746, 2011/12/12.
Cited by: 2
abstract▾ | bib▾

We present a theoretical and a numerical formalism for analysis and design of spintronic integrated circuits (SPINICs). The formalism encompasses a generalized circuit theory for spintronic integrated circuits based on nanomagnetic dynamics and spin transport. We propose an extension to the Modified Nodal Analysis technique for the analysis of spin circuits based on the recently developed spin conduction matrices. We demonstrate the applicability of the framework using an example spin logic circuit described using spin Netlists.
```
    @article{manipatruni2011circuit,
      title={Circuit theory for spice of spintronic integrated circuits},
      author={Manipatruni, Sasikanth and Nikonov, Dmitri E and Young, Ian A},
      journal={arXiv preprint arXiv:1112.2746},
      year={2011}
    }
  
```
(pdf)
Padmaraju, Kishore and Ophir, Noam and Xu, Qianfan and Schmidt, Bradley and Shakya, Jagat and Manipatruni, Sasikanth and Lipson, Michal and Bergman, Keren. Circuit theory for spice of spintronic integrated circuits. 2011 37th European Conference and Exhibition on Optical Communication pages 1--3, 2011/9/18.
Cited by: 12
abstract▾ | bib▾

We demonstrate the first error-free transmission of DPSK using a microring modulator, with a power penalty of 1.1 dB in comparison to a commercial LiNbO3 phase modulator. Additionally, long-haul transmission of microring-modulated DPSK is characterized.
```
    @inproceedings{padmaraju2011error,
      title={Error-free transmission of DPSK at 5 Gb/s using a silicon microring modulator},
      author={Padmaraju, Kishore and Ophir, Noam and Xu, Qianfan and Schmidt, Bradley and Shakya, Jagat and Manipatruni, Sasikanth and Lipson, Michal and Bergman, Keren},
      booktitle={2011 37th European Conference and Exhibition on Optical Communication},
      pages={1--3},
      year={2011},
      organization={IEEE}
    }
  
```
(pdf)
Padmaraju, Kishore and Ophir, Noam and Manipatruni, Sasikanth and Poitras, Carl B and Lipson, Michal and Bergman, Keren. DPSK modulation using a microring modulator. CLEO: Science and Innovations pages CTuN4, 2011/5/1.
Cited by: 14
abstract▾ | bib▾

We present the first experimental demonstration of DPSK modulation using a microring modulator. A 250-Mb/s electro-optic silicon microring modulator is shown with a measured 2-dB power penalty in comparison to a commercial LiNbO 3 phase modulator.
```
    @inproceedings{padmaraju2011dpsk,
      title={DPSK modulation using a microring modulator},
      author={Padmaraju, Kishore and Ophir, Noam and Manipatruni, Sasikanth and Poitras, Carl B and Lipson, Michal and Bergman, Keren},
      booktitle={CLEO: Science and Innovations},
      pages={CTuN4},
      year={2011},
      organization={Optical Society of America}
    }
  
```
(pdf)
Wiederhecker, Gustavo S and Manipatruni, Sasikanth and Lee, Sunwoo and Lipson, Michal. Broadband tuning of optomechanical cavities. Optics Express volume 19 issue 19 pages 2782--2790, 2011/1/31.
Cited by: 43
abstract▾ | bib▾

We demonstrate broadband tuning of an optomechanical microcavity optical resonance by exploring the large optomechanical coupling of a double-wheel microcavity and its uniquely low mechanical stiffness. Using a pump laser with only 13 mW at telecom wavelengths we show tuning of the silicon nitride microcavity resonances over 32 nm. This corresponds to a tuning power efficiency of only 400 mW/nm. By choosing a relatively low optical Q resonance (≈18,000) we prevent the cavity from reaching the regime of regenerative optomechanical oscillations. The static mechanical displacement induced by optical gradient forces is estimated to be as large as 60 nm.
```
    @article{wiederhecker2011broadband,
      title={Broadband tuning of optomechanical cavities},
      author={Wiederhecker, Gustavo S and Manipatruni, Sasikanth and Lee, Sunwoo and Lipson, Michal},
      journal={Optics Express},
      volume={19},
      number={3},
      pages={2782--2790},
      year={2011},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Preston, Kyle and Chen, Long and Lipson, Michal. Ultra-low voltage, ultra-small mode volume silicon microring modulator. Optics Express volume 18 issue 17 pages 18235--18242, 2010/8/16.
Cited by: 102
abstract▾ | bib▾

We show GHz modulation in a 2.5 µm radius silicon micro-ring, with only 150 mV peak-peak drive voltage and an electro-optic modal volume of only 2 µm^3. The swing voltage and the micro-ring modulator are the smallest demonstrations so-far in silicon. The presented approach lays the ground work for a new class of high speed low voltage modulators enabling, seamless integration of nanophotonics with low voltage digital CMOS nano-electronics.
```
    @article{manipatruni2010ultra,
      title={Ultra-low voltage, ultra-small mode volume silicon microring modulator},
      author={Manipatruni, Sasikanth and Preston, Kyle and Chen, Long and Lipson, Michal},
      journal={Optics express},
      volume={18},
      number={17},
      pages={18235--18242},
      year={2010},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Chen, Long and Lipson, Michal. Ultra high bandwidth WDM using silicon microring modulators. Optics Express volume 18 issue 16 pages 16858--16867, 2010/8/2.
Cited by: 95
abstract▾ | bib▾

We report 50 Gbit/s modulation capability using four silicon micro ring modulators within a footprint of 500 µm^2. This is the highest total modulation capability shown in silicon using compact micro-ring modulators. Using the proposed techniques, silicon nanophotonic bandwidths can meet the requirements of future CMOS interconnects by using multiple wavelengths to extend beyond single device speeds.
```
    @article{manipatruni2010ultra,
      title={Ultra high bandwidth WDM using silicon microring modulators},
      author={Manipatruni, Sasikanth and Chen, Long and Lipson, Michal},
      journal={Optics express},
      volume={18},
      number={16},
      pages={16858--16867},
      year={2010},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Biberman, Aleksandr and Manipatruni, Sasikanth and Ophir, Noam and Chen, Long and Lipson, Michal and Bergman, Keren. First demonstration of long-haul transmission using silicon microring modulators. Optics Express volume 18 issue 15 pages 15544--15552, 2010/7/19.
Cited by: 60
abstract▾ | bib▾

We report error-free long-haul transmission of optical data modulated using a silicon microring resonator electro-optic modulator with modulation rates up to 12.5 Gb/s. Using bit-error-rate and power penalty characterizations, we evaluate the performance of this device with varying modulation rates, and perform a comparative analysis using a commercial electro-optic modulator. We then experimentally measure the signal integrity degradation of the high-speed optical data with increasing propagation distances, induced chromatic dispersions, and bandwidth-distance products, showing error-free transmission for propagation distances up to 80 km. These results confirm the functional ubiquity of this silicon modulator, establishing the potential role of silicon photonic interconnects for chip-scale high-performance computing systems and memory access networks, optically-interconnected data centers, as well as high performance telecommunication networks spanning large distances.
```
    @article{biberman2010first,
      title={First demonstration of long-haul transmission using silicon microring modulators},
      author={Biberman, Aleksandr and Manipatruni, Sasikanth and Ophir, Noam and Chen, Long and Lipson, Michal and Bergman, Keren},
      journal={Optics express},
      volume={18},
      number={15},
      pages={15544--15552},
      year={2010},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Lira, Hugo LR and Manipatruni, Sasikanth and Lipson, Michal. Broadband hitless silicon electro-optic switch for on-chip optical networks. Optics Express volume 17 issue 25 pages 22271--22280, 2009/12/7.
Cited by: 119
abstract▾ | bib▾

We report on the demonstration of a broadband (60 GHz), spectrally hitless, compact (20 µm x 40 µm), fast (7 ns) electro-optical switch. The device is composed of two coupled resonant cavities, each with an independently addressable PIN diode. This topology enables operation of the switch without perturbing adjacent channels in a wavelength division multiplexing (WDM) system.
```
    @article{lira2009broadband,
      title={Broadband hitless silicon electro-optic switch for on-chip optical networks},
      author={Lira, Hugo LR and Manipatruni, Sasikanth and Lipson, Michal},
      journal={Optics Express},
      volume={17},
      number={25},
      pages={22271--22280},
      year={2009},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Chen, Long and Preston, Kyle and Manipatruni, Sasikanth and Lipson, Michal. Integrated GHz silicon photonic interconnect with micrometer-scale modulators and detectors. Optics Express volume 17 issue 17 pages 15248--15256 2009/8/17.
Cited by: 207
abstract▾ | bib▾

We report an optical link on silicon using micrometer-scale ring-resonator enhanced silicon modulators and waveguide-integrated germanium photodetectors. We show 3 Gbps operation of the link with 0.5 V modulator voltage swing and 1.0 V detector bias. The total energy consumption for such a link is estimated to be ~120 fJ/bit. Such a compact and low power monolithic link is an essential step towards large-scale on-chip optical interconnects for future microprocessors.
```
    @article{chen2009integrated,
      title={Integrated GHz silicon photonic interconnect with micrometer-scale modulators and detectors},
      author={Chen, Long and Preston, Kyle and Manipatruni, Sasikanth and Lipson, Michal},
      journal={Optics express},
      volume={17},
      number={17},
      pages={15248--15256},
      year={2009},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Preston, Kyle and Manipatruni, Sasikanth and Gondarenko, Alexander and Poitras, Carl B and Lipson, Michal. Deposited silicon high-speed integrated electro-optic modulator. Optics Express volume 17 issue 7 pages 5118--5124 2009/3/30.
Cited by: 129
abstract▾ | bib▾

We demonstrate a micrometer-scale electro-optic modulator operating at 2.5 Gbps and 10 dB extinction ratio that is fabricated entirely from deposited silicon. The polycrystalline silicon material exhibits properties that simultaneously enable high quality factor optical resonators and sub-nanosecond electrical carrier injection. We use an embedded p^+n^-n^+ diode to achieve optical modulation using the free carrier plasma dispersion effect. Active optical devices in a deposited microelectronic material can break the dependence on the traditional single layer silicon-on-insulator platform and help lead to monolithic large-scale integration of photonic networks on a microprocessor chip.
```
    @article{preston2009deposited,
      title={Deposited silicon high-speed integrated electro-optic modulator},
      author={Preston, Kyle and Manipatruni, Sasikanth and Gondarenko, Alexander and Poitras, Carl B and Lipson, Michal},
      journal={Optics express},
      volume={17},
      number={7},
      pages={5118--5124},
      year={2009},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Dong, Po and Xu, Qianfan and Lipson, Michal. Tunable superluminal propagation on a silicon microchip. Optics letters volume 33 issue 24 pages 2928--2930, 2008/12/15.
Cited by: 27
abstract▾ | bib▾

We demonstrate tunable superluminal propagation in a silicon microphotonic device in a solid-state room-temperature device of tens of micrometers in dimension allowing easy integration with high-bandwidth room-temperature systems. We achieve tunable negative delays up to 85 ps and effective group indices tunable between −1158 and −312
```
    @article{manipatruni2008tunable,
      title={Tunable superluminal propagation on a silicon microchip},
      author={Manipatruni, Sasikanth and Dong, Po and Xu, Qianfan and Lipson, Michal},
      journal={Optics letters},
      volume={33},
      number={24},
      pages={2928--2930},
      year={2008},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Dokania, Rajeev K and Schmidt, Bradley and Sherwood-Droz, Nicol{\'a}s and Poitras, Carl B and Apsel, Alyssa B and Lipson, Michal. Wide temperature range operation of micrometer-scale silicon electro-optic modulators. Optics letters volume 33 issue 19 pages 2185--2187, 2008/10/1.
Cited by: 115
abstract▾ | bib▾

We demonstrate high bit rate electro-optic modulation in a resonant micrometer-scale silicon modulator over an ambient temperature range of 15 K. We show that low bit error rates can be achieved by varying the bias current through the device to thermally counteract the ambient temperature changes. Robustness in the presence of thermal variations can enable a wide variety of applications for dense on chip electronic photonic integration.
```
    @article{manipatruni2008wide,
      title={Wide temperature range operation of micrometer-scale silicon electro-optic modulators},
      author={Manipatruni, Sasikanth and Dokania, Rajeev K and Schmidt, Bradley and Sherwood-Droz, Nicol{\'a}s and Poitras, Carl B and Apsel, Alyssa B and Lipson, Michal},
      journal={Optics letters},
      volume={33},
      number={19},
      pages={2185--2187},
      year={2008},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Poitras, Carl and Xu, Qianfan and Lipson, Michal. Electro-optic Tuning of On-Chip Optical Transparency. LEOS 2007-IEEE Lasers and Electro-Optics Society Annual Meeting Conference Proceedings pages 539--540, 2007/10/21.
Cited by: 1
abstract▾ | bib▾

We demonstrate electro-optic tuning of coupled resonator induced transparency on a silicon chip. We tune the quality factor of the transparency mode between 20000 and 6000. On-Chip coherent manipulation of light at room temperature for storing, delaying, stopping and time reversing of light pulses has profound implications for optical communications and quantum information processing. We have recently shown the ability to produce an optical transparency window on-chip using ring resonators [1]. Such optical transparency would enable the breaking of traditional limits imposed by the delaybandwidth product.
```
    @inproceedings{manipatruni2007electro,
      title={Electro-optic Tuning of On-Chip Optical Transparency},
      author={Manipatruni, Sasikanth and Poitras, Carl and Xu, Qianfan and Lipson, Michal},
      booktitle={LEOS 2007-IEEE Lasers and Electro-Optics Society Annual Meeting Conference Proceedings},
      pages={539--540},
      year={2007},
      organization={Citeseer}
    }
  
```
(pdf)
Manipatruni, Sasikanth and Xu, Qianfan and Lipson, Michal. PINIP based high-speed high-extinction ratio micron-size silicon electro-optic modulator. Optics express volume 15 issue 20 pages 13035--13042, 2007/10/1.
Cited by: 68
abstract▾ | bib▾

We propose an electrooptic device in silicon based on a p-i-n-i-p device structure for charge transport. The proposed device exhibits carrier injection time of 10 ps and extraction time of 15 ps enabling 100 GHz operation. When integrated into a resonator the proposed micron-size device operates at 40 Gb/s with 12 dB extinction ratio and 4fJ/bit/micron-length power dissipation, limited in speed only by the photon lifetime of the resonator.
```
    @article{manipatruni2007pinip,
      title={PINIP based high-speed high-extinction ratio micron-size silicon electro-optic modulator},
      author={Manipatruni, Sasikanth and Xu, Qianfan and Lipson, Michal},
      journal={Optics express},
      volume={15},
      number={20},
      pages={13035--13042},
      year={2007},
      publisher={Optical Society of America}
    }
  
```
(pdf)
Schmidt, Bradley and Xu, Qianfan and Shakya, Jagat and Manipatruni, Sasikanth and Lipson, Michal. Compact electro-optic modulator on silicon-on-insulator substrates using cavities with ultra-small modal volumes. Optics express volume 15 issue 6 pages 3140--3148, 2007/3/19.
Cited by: 136
abstract▾ | bib▾

We experimentally demonstrate a micron-size electro-optic modulator using a high-index-contrast silicon Fabry-Pérot resonator cavity. This compact device consists of a 1-D cavity formed within a single mode silicon channel waveguide and an embedded p-i-n junction on a silicon-oninsulator platform. The entire device is 6.0 microns in length. We demonstrate modulation depths as large as 5.87 dB at speeds of 250 Mbps limited only by fabrication imperfections, with optimized theoretical speeds of several Gbps.
```
    @article{schmidt2007compact,
      title={Compact electro-optic modulator on silicon-on-insulator substrates using cavities with ultra-small modal volumes},
      author={Schmidt, Bradley and Xu, Qianfan and Shakya, Jagat and Manipatruni, Sasikanth and Lipson, Michal},
      journal={Optics Express},
      volume={15},
      number={6},
      pages={3140--3148},
      year={2007},
      publisher={Optical Society of America}
    }
  
```